Solid-state image sensors are widely used in camera systems. The solid-state image sensors in some camera systems have a matrix of photosensitive elements in series with switching and amplifying elements. The photosensitive elements may be, for example, photoreceptors, photodiodes, PIN diodes, phototransistors, charge-coupled device (CCD) gates, or other similar elements. Each photosensitive element receives incident light corresponding to a portion of a scene being imaged. A photosensitive element, along with its accompanying electronics, is called a picture element (“pixel”) or a pixel circuit. Each photosensitive element produces an electrical signal relative to the light intensity of the image. The electrical signal generated by the photosensitive element is typically a current proportional to the amount of electromagnetic radiation (i.e., light) incident on the photosensitive element.
The electrons generated by the photons in the photodiode are converted to voltage in a capacitor (e.g., a sense capacitor) and stored there until the signal is read out of the pixel circuit. In choosing or designing a capacitor for the pixel circuit, there are several considerations including matching, linearity, fill factor, and leakage. Matching refers to the similarity of the photodiode (PD) capacitance and the sense capacitance. Scalability is related to matching. Linearity refers to the linearity of the electrical response of the photodiode resulting from incident light on the photodiode. A pixel's fill factor relates to the amount of pixel area used for the photodiode compared to the total area of the pixel. In other words, fill factor relates to how much of the surface area of an imager is used for photodiodes and how many pixels can be placed into a given surface area. The fill factor of the pixel is at least partially determinative of responsiveness of the pixel (as a part of final signal-to-noise ratio of the pixel). Leakage relates to the amount of energy that is lost over time from a charged capacitor. Leakage of the floating diffusion capacitor can significantly degrade pixel performance.
There are many types of conventional sense capacitor technologies such as diffusion capacitors (usually called floating diffusion (FD) capacitors), metal oxide semiconductor (MOS) capacitors, double poly capacitors, and standard metal-insulator-metal (MIM) capacitors. Each conventional capacitor technology has certain advantages and disadvantages.
Conventional diffusion capacitors are typically implemented using n+ or n-type lightly doped drain (NLDD) regions. While conventional diffusion capacitors do not require additional processing, conventional diffusion capacitors suffer in aspects of linearity, scalability, and dark current (DC) leakage. Conventional floating diffusion capacitors also suffer in that they act as parasitic photodiodes. In addition, achieving large fill factors places severe limits on how large a diffusion capacitor can be and, hence, what the maximum capacitance value can be.
Conventional MOS capacitors are typically implemented using a substrate with an oxide layer on one side. One metal contact is formed on the oxide layer, and a second metal contact is formed on the opposite side of the substrate. Conventional MOS capacitors typically have a high capacitance per unit area. However, conventional MOS capacitors usually suffer in aspects of linearity and scalability. Although additional implantation can provide improved linearity compared to conventional diffusion capacitors, the response is still not linear. Conventional MOS capacitors also suffer in active area usage, which reduces the fill factor of the corresponding pixel circuit. For example, conventional MOS capacitors typically cannot be used for pixels which have a pitch (i.e., width) of less than 3 μm.
Conventional double poly capacitors are typically implemented using two poly layers on a substrate. While double poly capacitors offer relatively good linearity and controllability, conventional double poly capacitors suffer in terms of processing cost and complexity. Conventional double poly capacitors also suffer in regard to scalability and fill factor.
Conventional MIM capacitors are typically implemented between metal layers in a pixel. FIG. 1 illustrates a conventional MIM capacitor 10. The conventional MIM capacitor 10 is formed between an upper metal layer 12 and a lower metal layer 14. For example, in a triple-metal process, the conventional MIM capacitor 10 may be formed between the M3 (e.g., VDD) and M2 (e.g., VOUT) metal layers. In particular, the lower metal layer is used as a bottom electrode of the conventional MIM capacitor, and a top electrode 16 is coupled to the upper metal layer 12 by a via 18 through a dielectric layer 20 separating the upper metal layer 12 from the lower metal layer 14. The top electrode 16 and the lower metal layer 14, which form the conventional MIM capacitor 10, are separated by a dielectric layer 22.
FIG. 2 illustrates a pixel stack 40 using conventional MIM capacitors 10. As described above, the conventional MIM capacitors 10 are formed between the M2 and M3 metal layers. Since the conventional MIM capacitors 10 use the M2 metal layer as a bottom electrode, and the M2 metal layer is typically used for routing output voltages, the physical size and capacitance of the conventional MIM capacitors 10 are limited.
FIG. 3 illustrates a pixel routing layout 60 using conventional MIM capacitors 10. As described above, the conventional MIM capacitors 10 are typically implemented between an upper metal layer 12 and a lower metal layer 14 (shown dashed). The physical area of the conventional MIM capacitor 10 is represented by the dielectric layer 22 between the top electrode 16 and the lower metal layer 14, which is the bottom electrode of the conventional MIM capacitor 10. Although the top electrode 16 is omitted for clarity, it is similar in size and orientation to the dielectric layer 22. In one embodiment, the upper metal layer 12 (e.g., M3) may define an optical aperture 62 for the photodiode 64 of the pixel stack 40.
Out of the various types of conventional capacitors described above, conventional MIM capacitors are generally the best in terms of linearity, leakage, and controllability. However, the use of conventional MIM capacitors in a pixel circuit drastically reduces the fill factor and increases process cost. This is because additional metal layout (i.e., features) is added to the pixel in order to implement a standard MIM. Since the additional metal will block light transmission to the photodiode, there is a trade-off between fill factor and maximum capacitance of the conventional MIM capacitor.
Additionally, the use of conventional MIM capacitors impacts the routing of the lower metal layer 14. Since the capacitance of the conventional MIM capacitor depends on the available area of the lower metal layer, implementing conventional MIM capacitors can make it difficult to route the lower metal layer. Alternatively, the capacitance of conventional MIM capacitors might suffer if limited surface area of the lower metal layer is accessible. For these reasons, conventional MIM capacitors are typically not used to implement a floating diffusion capacitor in a pixel circuit.